1. Field of the Invention
The present invention relates to a method of manufacturing an insulated-gate type field effect transistor.
2. Description of the Related Art
An insulated-gate type field effect transistor (to be referred to as a MIS transistor hereinafter) in a conventional integrated circuit is manufactured as shown in FIGS. 1A to 1D.
As shown in FIG. 1A, insulating film 2 is formed on a surface of p-type Si substrate 1, and substrate 1 is subjected to ion implantation to form a channel-doped region 3 for controlling a threshold value. Then, as shown in FIG. 1B, using film 2 or after removing it, a gate insulating film is formed, and then polycrystalline silicon film 4 is deposited on an entire surface. Thereafter, as shown in FIG. 1C, film 4 is patterned to form gate electrode 5. Finally, as shown in FIG. 1D, an impurity is ion-implanted using electrode 5 as a mask, thereby forming source region 6 and drain region 7.
The above conventional MIS transistor manufacturing method has the following problems.
A first problem is associated with the thickness of electrode 5. That is, in order to form source and drain regions 6 and 7 by ion-implanting the impurity using electrode 5 as a mask, the gate electrode must have a sufficient thickness. If the thickness of the gate electrode is not sufficient, the impurity is doped through the gate electrode and adversely affects an impurity concentration of a channel region. When polycrystalline silicon, which is a typical gate electrode material, is used as the gate electrode, the thickness of the gate electrode must be about 4,000 .ANG.. That is, a thin gate electrode cannot be formed. Therefore, short-circuiting occurs due to discontinuity of an insulating film formed on a stepped portion of this thick gate electrode, and discontinuity of an interconnection layer formed thereon is generated.
In addition, since a selective etching ratio of the gate electrode to the gate insulating layer is small, if a thin gate electrode cannot be formed, a thin insulating film cannot be formed. For this reason, it is difficult to form a fine MIS transistor. Normally, when the gate electrode consists of polycrystalline silicon having a thickness of 4,000 .ANG., the thickness of the gate insulating film must be 200 .ANG.or more.
Another problem is associated with utilizing a thick gate electrode. It is difficult to perform ion-implantation through the thick gate electrode. For this reason, ion implantation to the channel region for controlling a threshold voltage must be performed before the gate electrode is formed. In this case, since the impurity in the channel region is rediffused in a thermal treatment step for activating the impurity in the source and drain regions, it is difficult to obtain sharp distribution of the impurity in the channel region. In general, the impurity concentration distribution of the channel region largely affects electrical characteristics of the MIS transistor. Especially, the impurity concentration near the surface of the channel region largely affects a threshold value, and the concentration inside the substrate largely affects punch-through characteristics or a substrate bias effect. Therefore, if the impurity concentration distribution of the channel region is not sharp, it is difficult to optimally control the threshold value, the punch-through characteristics, and the substrate bias effect.
As described above, according to the conventional MIS transistor manufacturing method, since the gate electrode must be sufficiently thick, large steps are formed on its surface, thereby degrading reliability of the device. Moreover, since ion implantation in the channel region is performed before formation of the gate electrode, it is difficult to optimally design the device characteristics.